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16215 alton parkway ? p.o. box 57013 irvine, california 92619-7013 phone: 949-450-8700 fax: 949-450-8710 white paper a scalable approach to gigabit ethernet switch design 06/27/02
broadcom corporation 16215 alton parkway p.o. box 57013 irvine, california 92619-7013 ? copyright 2002 by broadcom corporation all rights reserved printed in the u.s.a. broadcom ? and the pulse logo ? are trademarks of broadcom corporation and/or its subsidiaries in the united states and certain other countries. all other trademarks are the property of their respective owners. r evision h istory revision # date change description 567x_569x-wp100-r 06/27/02 initial release
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r page iii t able of c ontents the lan switching landscape ................................................................................................................... 1 the market opportunity ......................................................................................................... ................. 1 design challenges.............................................................................................................. .................... 1 strataxgs gigabit ethernet architecture .................................................................................................. 2 reduced components ............................................................................................................. ............... 2 interoperability with broadcom strataswitch.................................................................................... ....... 2 quality of service............................................................................................................. ....................... 3 higig? interface ............................................................................................................... ..................... 3 integrated serializer/deserializer (serdes).................................................................................... ......... 3 strataxgs product family .......................................................................................................................... 4 what to build and how to build it ............................................................................................................... 7 types of systems ............................................................................................................... .................... 7 interconnect decisions......................................................................................................... ................... 9 other system design decisions ............................................................................................................... 12 fixed systems .................................................................................................................. .................... 12 stackable systems .............................................................................................................. ................. 12 modular chassis ................................................................................................................ ................... 12 integrated switch/servers ...................................................................................................... ............... 13 unmanaged systems.............................................................................................................. .............. 13 system differentiation ......................................................................................................... .................. 13 build or buy?.................................................................................................................. ....................... 13 strataxgs features and benefits in depth .............................................................................................. 14 expedited time to market ....................................................................................................... .............. 14 broadcom switch application programming interface (api)................................................................. 14 integrated approach to stacking................................................................................................ ........... 15 resiliency/redundancy at the port level ........................................................................................ ..... 16 performance .................................................................................................................... ..................... 16 traffic prioritization and management .......................................................................................... ........ 16 layer 2 features ............................................................................................................... .................... 17 layer 3 features ............................................................................................................... .................... 17 security ....................................................................................................................... .......................... 17 integrated serdes interface .................................................................................................... .............. 18 switch development kit and evaluation system .................................................................................. 1 8 sample system configurations ................................................................................................................ 19 summary and conclusion ......................................................................................................................... 22
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page iv document 567x_569x-wp100-r l ist of f igures figure 1: bcm5670 block diagram ................................................................................................. ............... 4 figure 2: bcm5690 block diagram ................................................................................................. ............... 5 figure 3: enterprise lan applications: scalable architecture for building different types of systems......... 8 figure 4: a simplex interconnect................................................................................................ .................... 9 figure 5: a full-duplex interconnect............................................................................................ .................10 figure 6: a matrix interconnect................................................................................................. ....................10 figure 7: a daisy chain interconnect ............................................................................................ ...............11 figure 8: 24 fe port + 22 ge port applications .................................................................................. .........14 figure 9: the broadcom api at work .............................................................................................. .............15 figure 10: fixed 24-port ge switch with optional advanced function module .............................................19 figure 11: 24-port ge switch with active stack module ........................................................................... .....20 figure 12: 48-port nonblocking ge switch........................................................................................ .............21
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r page v l ist of t ables table 1: strataxgs chips........................................................................................................ ..................... 6 table 2: summary of system interconnect considerations ........................................................................ 11 table 3: how features are implemented........................................................................................... ......... 17 table 4: strataxgs sdk part numbers ............................................................................................. ........ 18
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page vi document 567x_569x-wp100-r
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r the lan switching landscape page 1 t he lan s witching l andscape enterprise network traffic volumes are accelerating quickly. as a result, organizations are seeking much faster lan connections?to gigabit speeds and beyond?not only in their campus backbones, but also in their wiring closets for high- speed connectivity all the way to user desktops. there are several application drivers behind the exploding volumes of enterprise traffic. businesses are continuing to grow progressively more reliant on their corporate networks for automating their business processes. for example, web-centric applications, often multimedia in nature, have emerged not only to reach employees across corporate intranets, but also to enable enterprises to communicate with their business partners across extranets and to serve customers via the internet. specifically, a few of the primary applications driving gigabit-speed network requirements include following: ? storage-area networks, which allow multiple servers access to the same storage devices connected by a multi gigabit-speed switch network-based corporate training, often involving streaming media or interactive video conferencing network-based transport for pc and server data backup ip pbxs, which enable the convergence of voice and data on the corporate lan t he m arket o pportunity the sheer volume of traffic spilling onto corporate networks is driving gigabit ethernet switch requirements. the dell'oro group, for example, predicts that worldwide ethernet switch sales will increase from $11.5 billion in 2001 to $18.9 billion in 2006. the firm attributes the predicted growth to the availability of 10-gigabit ethernet, gigabit ethernet over copper, and layer 3 ethernet switching technologies. these market figures indicate that lan switch makers are quickly coming under market pressure to deliver their gigabit ethernet systems. d esign c hallenges in this milieu, equipment-makers are faced with several challenges. these include being able to quickly build high- availability, high-throughput devices that can scale to meet the needs of various-sized and growing businesses. designers also must be able to easily setup their devices in the configurations that match their target customer and application. these configurations include the following: stackable switches for wiring closet applications chassis-based systems for highly resilient backbone applications integrated switch/servers for high-speed server interconnections standalone or ?fixed? switches for small/medium-sized enterprise applications unmanaged switches for small environments with no it support projected gigabit ethernet growth* no. of ports (in millions) 5 104 $11.5 $18.9 2001 2001 2006 equipment sales (in us $billions) 2006 *combined 1-ge and 10-ge market opportunity source: pioneer consulting, llc
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 2 strataxgs gigabit ethernet architecture document 567x_569x-wp100-r another prevalent system challenge is to minimize design, assembly, and manufacturing costs. methods for lowering total costs are by constructing a switch using a minimum number of components, reusing chip resources and development expertise, and using a simple board assembly. and what about system features? to satisfy end customer requirements, switch makers must consider including most, if not all, of the following capabilities in their products: layer 2 switching with associated 802.1q virtual lan (vlan) support and 802.1p traffic classification capabilities layer 3 routing quality of service (qos) for prioritizing certain traffic, such as latency-sensitive voice over ip (voip) packets layer 2 and 3 multicasting for bandwidth-efficient point-to-multipoint transmissions very high levels of resiliency and switch uptime to ensure network reliability a high-throughput backplane that enables wire-speed performance scalability?including high port density in a small amount of board space?so end customers can grow their networks as needed at a reasonable cost per port security, such as per-port mac address filtering, firewall filtering, and intrusion detection capabilities the ability to integrate features such as qos, trunking, and port mirroring (for diagnostics) across interconnected modules to ensure consistent performance and resiliency, end to end all of these capabilities are supported in the broadcom strataxgs? switch architecture from broadcom corporation. the sections that follow examine the components and attributes of this modular and highly integrated architecture. the following sections will also discuss the form factors that can be designed with the strataxgs family?often, in conjunction with members of broadcom?s strataswitch ii? fast ethernet (1 0/100 mbps) family?and the important decisions and design considerations that accompany building these devices. s trata xgs g igabit e thernet a rchitecture r educed c omponents the broadcom strataxgs architecture has been designed so that only a small number of components are required to build a variety of layer 2/3 systems in different form factors that support a range of port densities. strataxgs components support a high level of integration, with all memory, interfaces , packet forwarding and other capabilities supported on-chip. the integrated nature of the architecture delivers approximately a 75% reduction in the number of chips required over competing solutions, which results in lower manufacturing costs. t he reduced component count also yields higher-quality products because of the decreased complexity; broadcom estimates that the strataxgs solution reduces mean time between failures (mtbf) by about 20%. i nteroperability with b roadcom s trata s witch the strataxgs architecture is an extension to the proven broadcom strataswitch ii (fast ethernet) architecture. there are already 20 million strataswitch ports deployed in the marketplace today. strataxgs is compatible with strataswitch in several ways. first, the packet flows from ingress to egre ss is the same. secondly, memory management is consistent across the two architectures. lastly, use of the fourth-generation broadcom switch application programming interface (api) for enabling custom features is portable across both families. the integrated nature of the two architectures enables designers familiar with broadcom strataswitch to re-use their engineering and development expertise, which lowers costs and expedites time to market. switch-makers can also use both the strataswitch and strataxgs chips as building blocks in a common design to mix fast ethernet, gigabit ethernet, and 10-gigabit ethernet ports in standalone/fixed, chassis, stackable, server, and unmanaged switch form factors.
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r strataxgs gigabit ethernet architecture page 3 with the strataxgs family, broadcom has improved the strataswitch architecture in several ways: the depth of ip address tables and routing information has been significantly increased. switches that can store more route entries can support a greater number of attached devices. strataxgs family of components uses a widely used approach called hashing , which increases table lookup performance compared with binary search capabilities. broadcom has built a special 10-gbps chip-to-chip interface, which improves scalability and performance. q uality of s ervice strataxgs chips offer extensive support for packet classification, marking, and prioritization to enable qos support. qos on the lan is increasingly a checklist item for enterprise customers, who are beginning to run latency-sensitive applications such as voip locally. end customers might also want to ensure the integrity of high-priority data applications and enforce access control lists (acls). by leveraging the higig interface, class-of-service markings and qos can be integrated across a stack of chips used to build a system so that markings are not lost when packets are passed from one component to another. all strataxgs chip ports support eight cos queues into which traffic with different priority weights can be placed. h i g ig ? i nterface new to the broadcom product family is a 10-gbps, full-duplex chip-to-chip interface that enhances system scalability and performance, called the higig interface. it adds an 8-byte header to the layer 2 ge frame as it exits the interface. this header contains information about the packet, its source and destination ports, and port mirroring. this information hastens table lookups when two broadcom components are connected together, thus improving overall system performance. the higig interface allows the interconnection of several strataxgs chip modules to form systems with different port densities. communication between the cpus, a process called stacking , is performed in-band via the higig header using special master/slave protocols developed by broadcom. link a ggregation, port mirroring, and class-of-service markings are fully supported across the interconnected modules at wire speeds. i ntegrated s erializer /d eserializer (s er d es ) a serdes interface?which conver ts data from a parallel bus into a serial stream?is integrated onto each port of each strataxgs chip. this design precludes connections to external serdes chips, simplifying design. the integrated serdes support, cos functions, broadcom api, and other strataxgs features are described in more detail in the section, ?strataxgs features and benefits in depth.?
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 4 strataxgs product family document 567x_569x-wp100-r s trata xgs p roduct f amily the two primary chip components of the broadcom strataxgs gigabit ethernet switch architecture are the strataxgs bcm5670 and the strataxgs bcm5690 . the bcm5670 is a high-speed (160-gbps) switch fabric, also called a backplane or interconnect , that has eight 10-gbps ports. a smaller version, the bcm5671, is an 80-gbps switch fabric with four 10-gbps ports. the 10-gbps ports on the bcm5670 and bcm5671 are the building blocks for interconnecting line cards to a switch fabric. a 10-slot chassis, for example, can be designed with eight line cards and two management cards. the 10-gbps ports on the bcm5670/71 accept traffic from th e 10-gbps uplinks in other chip components, these can be arranged in a variety of configurations to build a gigabit et hernet switch of the size and configuration that matches the designer?s business plan. once traffic is placed on the switch fabric, it is switched, with no delay, to its egress port. switching with no delay is possible because the total bandwidth available on the switch fabric is greater than the sum of the speeds of all the ports feeding traffic onto it. therefore, no buffering queues are required that could introduce added delays. this design approach is called a nonblocking architecture. combining chips expands the number of ports in a system while also retaining the nonblocking throughput characteristics of a single switch. figure 1: bcm5670 block diagram arl ram ram higig higig higig higig higig higig higig higig 10g queue system 10g 10g 10g 10g 10g 10g 10g 10g 8 priority levels per port lookup of higig frame tag on-chip memor y
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r strataxgs product family page 5 the other primary strataxgs component, the bcm5690, is a switch-on-a-chip. it supports twelve 1-gbps ports and a one higig (10-gbps) interface. the bcm5690 can be used in a standalone fashion to build a fixed 12-port switch, or it can be combined with other bcm5690s, bcm5670s, or strataswitch components to form different-sized configurations and to achieve higher port densities. for example, eight bcm5690s can combine to scale from 12 to 96 ge ports. designers can link as many as 32 xgs chips (not including the switch fabric) for a maximum configuration of 384 ge ports (ports using broadcom components) and 64 (32 with bcm5673) 10-ge ports. one can also create a system containing 768 fast ethernet using x-strataswitch and y-xgs components. figure 2: bcm5690 block diagram higig tm 10g packet buffer ffp mac(s) arl sram cpu/io 12 1-gbps ports contentaware tm packet treatment
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 6 strataxgs product family document 567x_569x-wp100-r another product, the bcm5691 , supports 12 ge ports but no uplink, for use in standalone configurations. both the bcm5690 and bcm5691 support a standard pci bus for moving signals to and from the cpu and, in the case of the bcm5690, to a pci uplink. strataxgs chips are highly programmable, in that system designers can add value and differentiate their companies? products by activating certain features with minor development work in software. using the broadcom api, new features are easily added to the existing chip. table 1: strataxgs chips product function(s) no. and type of ports supported bcm5670 160-gbps switch fabric. it is nonblocking, allowing all ports to operate concurrently at 100% utilization. eight 10-gbps ports bcm5690 switch-on-a chip can be combined back-to-back with another bcm5690 or to a bcm5670(s) to build bigger systems and achieve higher port densities eight bcm5690s can combine to scale from 12 to 96 ge ports supports both layer 2 and layer 3 capabilities twelve 1-gbps ports, each running at 10/100 full- and half- duplex or at 1 gbps full-duplex speeds one 10-gbps uplink bcm5671 80-gbps switch fabric. it is nonblocking, allowing all ports to operate concurrently at 100% utilization. four 10-gbps ports bcm5691 switch-on-a chip supports both layer 2 and layer 3 capabilities twelve 1-gbps ports, each running at 10/100 full- and half- duplex or at 1 gbps full-duplex speeds
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r what to build and how to build it page 7 w hat to b uild and h ow to b uild i t there are many types of gigabit ethernet switches that a designer might elect to build, depending on the enterprise applications the switch vendor wishes to support. a switch vendor might focus on building a particular type of system that addresses the needs of a specific customer environment or a pplication. a vendor might design and manufacture a family of switches to satisfy a range of business customer applications, such as a large enterprise?s wiring closet, campus backbone, and small branch office. t ypes of s ystems list below, are some of the types of switches that a switch vendor can design with the xgs product family stackable switches. these connect user desktops to the high-speed campus backbone. these highly scalable switches contain some number of gigabit ethernet or fast et hernet ?user? ports. traffic from these ports is aggregated over a higig uplink for connectivity to corporate data resources in servers and, increasingly, to call servers or ip pbxs for voip applications. stackables are often found in the wiring closet network segment to accommodate a growing user base. as additional users join the network, more ports can be added by ?stacking? additional switches on top of one another with a common external interconnect; in effect, creating one big integrated switch. chassis-based switches. this form factor is generally deployed in highly resilient backbone applications. these systems contain slots that can be used for redundant line cards, including system buses, power supplies, and security. they can be configured with redundant components to the degree deemed appropriate for the redundancy and manageability required for the installation. integrated switch/servers. this configuration combines application and data servers with network switches, thus allowing very high-speed server interconnections. in this configuration, server blades are generally interconnected across a ge switch backplane. serdes support in strataxgs chips plays a large role in this application, enabling high-speed connections across the backplane. the integrated switch/server form factor generally appeals to end customers looking for very high-speed server connectivity while wishing to collaps e functions into a single device to reduce capital costs and management complexity. standalone or ?fixed? switches. these are most often used in small/m edium-sized enterprise applications, where high growth is not expected. these systems arrive with a fixed number of ports. in order for the customer to accommodate additional users beyond the number of ports in that switch, additional systems must be purchased. unmanaged switches. this form factor represents the simplest of the devices and operates only at layer 2, which reduces software development and makes use of low-cost cpu interfaces. these switches are generally installed in small environments with no it support and where packet classification/ prioritization for voip or high-priority data applications is not required.
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 8 what to build and how to build it document 567x_569x-wp100-r figure 3: enterprise lan applications: scalable ar chitecture for building different types of systems note having common building blocks that can be used to build different types of switches provides a high roi on software investments and an expedited time to market. bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5671 bcm5670 higig tm higig tm higig tm 24-port ge standalone switch 24-port-and-up ge stackable or chassis switch chassis or server/switch system with 72 ge ports and 2 10 ge ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports 12 ge user ports
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r what to build and how to build it page 9 i nterconnect d ecisions for each gigabit ethernet switch form factor, designers require ge chips, physical-layer interfaces (including cabling and connectors), a cpu management system, a power supply, and an operating system for activating and customizing features. from there, some of the decisions the switch vendor/designer must make include whether the switch should be a single-chip or multiple-chip solution, this largely depends on the number of ports to be supported. for multiple-chip solutions, designers must decide what type of interconnect should be used to link the components and pass packets between them. the choices of interconnects include cascade , matrix , and daisy chain options. strataxgs cost-effectively supports all these configurations, which are described in more detail below. cascade. this is the simplest interconnect choice, most often used for low-end standalone/fixed systems. in this configuration, chips are connected in a shared-ring fashion; the transmitter of one module is connected to the receiver of the next module, and so on. the transmitter of the last module is connected to the receiver of the first module. the merits of this interconnect choice are that it is the least expensive and uses few resources; ports, backplanes and other resources are all shared. figure 4: a simplex interconnect bcm5690 bcm5690 bcm5690 one-way packet flow
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 10 what to build and how to build it document 567x_569x-wp100-r figure 5: a full-duplex interconnect matrix. this type of interconnect is typically used for chassis-based systems and higher-end fixed systems. in this configuration, switching components are one hop away from the central processor that controls all the switches. here, a switching fabric (bcm5670 or 5671) serves as a backplane to multiple bcm5690s that are connected to it. for resiliency, a matrix-based system can be configured with a redundant central processor, with switching chips interconnected to both processors in a full-mesh configuration. this interconnect approach adds reliability to ge systems. figure 6: a matrix interconnect daisy chain. in a daisy chain configuration, switches are interconnected to one another in a series. this modular configuration is highly scalable, as there is virtually no limit to the number of incremental ports and central management cpu bcm5690 bcm5690 bcm5690 two-way packet flow bcm5670 bcm5670 bcm5671 bcm5690 bcm5690 bcm5671 bcm5690 bcm5690 bcm5671 bcm5690 bcm5690
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r what to build and how to build it page 11 power that can be added. these characteristics are most appropriate for wiring closets in enterprise organizations where growth is expected or unpredictable. each daisy chain-connecte d switch is typically built using bcm5670s with multiple bcm5690s connected to them. figure 7: a daisy chain interconnect table 2: summary of system interconnect considerations system candidate(s) performance comparative cost benefits simplex fixed, low-end low low? low-cost, simple duplex chassis low, but could boost with the addition of a bcm5680 in the transmission path low low-cost, simple, with path redundancy for added resiliency cascade fixed, low-end low low cost-effective matrix stackable, fixed, chassis high high very high resiliency daisy chain stackable high medium very scalable, nonblocking switch vendors have a variety of choices for an interconnect configuration, depending on the type of system being built and the vendor?s priorities for performance, management, and cost . bcm5671 bcm5690 bcm5690 bcm5671 bcm5690 bcm5690 bcm5671 bcm5690 bcm5690
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 12 other system design decisions document 567x_569x-wp100-r o ther s ystem d esign d ecisions in addition to deciding among the various types of component interconnects, other decisions must be made for each type of switch to be developed. the primary ones are outlined below. f ixed s ystems the designer needs to make design choices if the system is to have more than 12 ports. if there are 12 or fewer ports in the system, the designer can simply use a bcm5691 as a standalone switch. to achieve larger port densities, the bcm5690 can be combined with additional bcm5690s or bcm5670 switch fabrics. at this point, the designer must decide if the switch should be optimized for cost or for performance. if the designer decides that the system cost is the most important factor, a cascade interconnect for linking the chip componentry should be chosen, and the bcm5690s will be linked without the benefit of the bcm5670 switch fabric in a shared-bandwidth configuration. if the designer decides that system performance is the most important factor, a matrix interconnect for linking the chip componentry should be chosen. in addition, a bcm5670 (or bcm5671) switch fabric will likely be included in the configuration so that packets are transmitted ov er a switched, rather than a shared, backplane. s tackable s ystems here, the designer must decide on a per-switch port count, then choose among the optional modules for the features and capabilities to be activated. for the highest-redundancy levels in the stack, designers are likely to choose a matrix interconnect; for highest performance, a daisy-chain interconnect is recommended. which cabling medium to use is another decision to be made when building stackable switches. system vendors can choose fiber cabling or various categories of copper cabling, and gigabit interface converters (gbics) are available for converting electrical copper signals to fiber-optics. designers also have the option of using a backplane trace to connect the switches to one another directly. m odular c hassis when designing these backbone devices, a switch vendor must decide how to balance the redundancy of the backplane for resiliency and uptime with the performance of each slot in the system. for redundancy, designers can choose to connect the two higig connections in each blade to two separate switch fabrics in a master/slave configuration. alternatively, the designer can connect each slot in a full mesh configuration, rather than using a switching fabric. this is a highly redundant setup; however, it does cause some performance degradation on each slot. from a performance perspective, if the system vendor elects to configure two switch fabrics in a master/slave setup, broadcom recommends running both switch fabrics concurrently, rather than leaving one to sit idle in standby mode for failover. from a management perspective, in the chassis system, t he switch vendor must decide whether to run a centralized management blade or to distribute management capabilities across individual blades. the latter choice is often more scalable, as switch makers can add more complex management features incrementally to the system as required.
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r other system design decisions page 13 i ntegrated s witch /s ervers in these systems, the maximum port density is usually not greater than 24 ports. the decisions here are the same as those of a fixed system ? whether to interconnect switching chips with a cascading or matrix interconnect. u nmanaged s ystems these systems are generally fixed systems that are installed in slow- or non-growth environments. again, the decisions here are port count and which interconnect type to use. s ystem differentiation depending on how the vendor programs the chips, system designers can derive different values out of the strataxgs family. for example, they can choose to activate and customize a number of routing, security, and voice features. to reduce componentry and development time, designers can use an ad vanced function module, a network processor that is software-upgradable, to activate server load balancing, wan interfaces, firewall functions and voip call server capabilities across all the components in a given system (see figure 12, in the ?sample system configurations? section). b uild or b uy ? another decision facing system vendors is whether they should develop their own software operating system for customizing and activating features or whether they should buy it. thos e who wish to purchase third-party software can acquire broadcom api-compatible operating systems from broadcom partners radlan and wind river systems inc. if the system vendor elects to build the software, the broadcom switch api reduces development time and effort by shielding upper-layer network applications and operating systems from the layer 1 interfaces. using the broadcom api enables easy migration between switch products and generations (see ?broadcom switch application programming interface (api)? on page 14 ).
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 14 strataxgs features and benefits in depth document 567x_569x-wp100-r s trata xgs f eatures and b enefits in d epth as mentioned, the strataxgs architecture is modular, yet integrated, to allow system vendors to develop gigabit ethernet switch products optimized for different market segments using the same components and familiar expertise. for additional flexibility, the strataxgs integrated circuits can be mixed and matched with broadcom strataswitch fast ethernet chips, which support 24 fast ethernet (10/100-mbps ports) with two ge uplinks. figure 8: 24 fe port + 22 ge port applications e xpedited t ime to m arket the architecture of the strataxgs product family as described earlier was developed to enable system designers to bring feature-rich systems to market quickly. the architecture enables this by giving designers a wide range of flexibility in the ty pe and size of systems they design while at the same time keeping the number of components required to do so small. reducing the chip count required for system design is a function of a high level of integration on each chip. memory, serdes, xaui, packet forwarding, and other capabilities are all collapsed onto a single component, reducing the complexity of board design. the architecture also simplifies development tasks with the structured and portable broadcom switch api, described below. b roadcom s witch a pplication p rogramming i nterface (api) the broadcom switch api, which comes free of charge with the architecture, enables systems designers to layer applications and their own software operating systems over the api without having to create special interfaces for each of the underlying chip components. the structured api is a system-level software interface that separates function calls from the driver component, so drivers do not have to be modified when a new function call is added. developers, can then write one command that can be driven to multiple components, while retaining the flexibility to exert chip-level control. chip components can thus be used ubiquitously, saving significant development time. system designers can quickly activate or disable the features using the api, which is portable to unix, linux, and wind river systems? vxworks operating systems. 5690 12 ge + 1 10-gig 5690 12 ge + 1 10-gig 5645 24 fe + 2 ge higig tm ge uplinks
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r strataxgs features and benefits in depth page 15 figure 9: the broadcom api at work i ntegrated a pproach to s tacking as mentioned, strataxgs products provide a stacking solution for connecting modules across a higig interface in a tightly integrated way that extends a number of powerful features across all the components so that no functionality is lost. the xaui-based higig interface extends the reach of features at wire speeds across both switch fabrics and cables. these features, for example, include trunking, port mirroring, vlan membership, qos, and a single ip address for unified management. in addition, multicast packets are distributed efficiently across the stack without replicating the packet at the source. by contrast, stackables built with competing products today have loose connections across the set of switches and do not offer the integration of these services across the modules. for example, in stackable switches built on competing architectures, qos mechanisms enforced at the interface level on a switch are lost when the frame is placed on the stack media. this is not the case with strataxgs. the integration is achieved by the 8-byte higig tag, which carries information relevant to trunking and port mirroring across the stack and is added to each packet that traverses the stack across higig interfaces. a single cpu and command line interface (cli) are used for management across a stack. in addition, new advanced discovery and management protocol s are available for stackable systems. these protocols, master discovery protocol (mdp) and reliable data protocol (rdp), designate a master device for control and management in a stack of chips. they also define a backup master, should the primary master fail. both mdp and rdp run on top of the broadcom api. ospf telnet other services switch/system vendor?s management software application broadcom api broadcom strataswitch or other broadcom chip broadcom strataxgs chip family member note: the proven, reliable broadcom development api hastens system vendors? time to market with new ge switches.
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 16 strataxgs features and benefits in depth document 567x_569x-wp100-r r esiliency /r edundancy at the p ort l evel enterprise customers are requiring near-100% uptime in their network equipment now, as data applications grow increasingly mission-critical and voice traffic (for which businesses have virtually no tolerance for downtime) joins the lan. there are several ways that the strataxgs architecture addresses this requirement. first, the bcm5670 has a redundant link so that system vendors can connect different ports across multiple paths. designers can also build a dual-chip configuration and trunk ports between two strataxgs chips. when both connections are up and running, traffic can be shared between the two connections. however, if one connection should fail, traffic will automatically fail over to the live chip. this function is in full compliance with the ieee 802.3ad specification for trunking. port mirroring is also supported; activity on a particular port can be copied onto another designated port, to which a sniffer can be attached for debugging and running diagnostics. this enables problems to be addressed without having to take any components out of commission while doing so, contributing considerably to system uptime. p erformance the strataxgs architecture, as mentioned, allows fo r nonblocking, wire-speed performance because the aggregate bandwidth in the backplane is greater than the sum of the incoming ports. activating any number of intelligent features, such as qos, does not affect performance, which is 32 million packets per second (pps) across the backplane. another feature that contributes to high-end performance is support for dual trunking, which enables traffic load sharing. strataxgs also prevents head-of-line (hol) blocking to boost throughput. to prevent hol blocking, when an egress port is congested because of class of service (cos) markings, packets destined to that port are dropped at ingress. flow control mechanisms are also at work to enhance performance. the system can send out ?pause? frames when the number of packets for a given port exceeds a predefined threshold. these features also are contributing factors to qos. t raffic p rioritization and m anagement ietf differentiated services (diffserv)-compliant cos capabilities enable systems built on the strataxgs architecture to mark differentiated services code point (dscp) bits in order to classify a frame, then take action on the frame based on that class. the broadcom contentaware? classification engine in the strataxgs chips allows for wire-speed layer 2 through layer 7 classification and management. this means that treatment of packets through the switch can be determined based on the application type. the broadcom-patented fast filter processor? (ffp) enables switches to take action on the frames according to ?if/then? scenarios. for example, a specific packet could be dropped, have its priority changed, or be steered to a specific port number in the event that certain network conditions exist. all the packe t inspection, filtering, trapping, modification, and steering performed by the ffp takes place at wire speed. ffp-enabled packet treatments require some customization on the part of the switch designer. qos capabilities in the strataxgs family also include metering/rate limiting to put a ceiling on the amount of network bandwidth that any one application, protocol, or user can consume. the strataxgs components can inspect a transmission up to 80 bytes deep at wire speed and can control bandwidth on each port to a 1 mbps granularity. systems vendors can write software specifying what frames to recognize and what action to take on those frames. strataxgs supports qos- awareness of all enterprise network components, including 802.11x wireless access points and voip phones that may be connected to an ethernet segment. packets destined for the cpu can have a separate priority than the rest of the ports; four priority classes are defined. packet s headed to cpu can be selectively enabled or disabled.
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r strataxgs features and benefits in depth page 17 l ayer 2 f eatures the strataxgs supports layer 2 switching capabilities in hardware for greater performance. these capabilities are, auto- learning mac addresses, address lookup, and packet forwarding. strataxgs ge switches can support 4096 vlans, 256 spanning trees, 256 layer 2 multicast sessions, and 16384 layer 2 switch table entries. l ayer 3 f eatures at layer 3, for increased performance, the hardware handles routing table lookup and forwarding. strataxgs ge switches can support 4096 layer 3 routing table entries and 512 virtual router interfaces. s ecurity strataxgs supports the ieee 802.1x authentication framewor k for port-based network access control. also, per-port security is offered to avoid denial-of-service (dos) attacks. this is achieved by denying access to certain mac addresses by programming bits in the routing table to be rejected. table 3: how features 1 are implemented 1. basic features, noncustomized switch function broadcom fast filter processor chip/api support (minimal initialization) software programming by switch designer voip call server (ip/pbx) ? layer 2 switching layer 3 switching (routing) ? billing and accounting ? bandwidth on demand ? policy management ? diffserv ? 802.1p/q ? remote monitoring (rmon) ? mirroring trunking ? ip multicast ? per-port security ? note the many rich features supported in the strataxgs architecture are activated in different ways. most require some custom programming in addition to basic support in a strataxgs chip.
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 18 strataxgs features and benefits in depth document 567x_569x-wp100-r i ntegrated s er d es i nterface the integration of a high-speed xaui-compatible serdes interface on each port reduces the complexity of board layout, because it eliminates the need for a component to connect to an external serdes chip. the serdes interface connects to both copper and fiber media. on strataxgs 1-gbps ports, serdes runs at 1-gbps. on strataxgs 10-gbps ports, four serial channels, each running at 3.125 gbps, are supported. se rdes delivers reduced signal traces, conserves board space, consumes lower power than parallel interfaces, and delivers superior electromagnetic interference (emi) performance (8b/ 10b). when strataxgs 1-gbps ports with integrated serdes can connect to copper transceivers, they do so using serial gigabit media independent interfaces (sgmii), which reduces pin count to four, down from 25, compared with using gigabit media independent interfaces (gmii). the reduced pin count lowers costs and simplifies design. s witch d evelopment k it and e valuation s ystem broadcom will supply reference boards for a fully functional switch for evaluation and to jump-start a system vendor?s development process. the bcm95690 sdk, for example, is available as a complete 24-port gigabit ethernet layer 2 ? 7 sdk, and evaluation system based on the bcm5690 switch-on-a-chip. the sdk provides a platform for accelerated software development and product evaluation. it includes a printed circuit board with a typical configuration of two bcm5690s connected back-to-back and integrated to deliver 24 ge copper ports and two optional fiber ports via gbics. the sdk comes with the wind river vxworks real-time operating system, 19-inch rack-mount chassis with compact pci backplane and power supply, and the latest version of the broadcom api driver source code. table 4 lists all the sdks that are available for strataxgs products. part number legend: k= switch development kit r = reference design s = stackable u = upgrade board only (no chassis or power supply) table 4: strataxgs sdk part numbers part number description bcm95670k8 switch fabric development kit with 8 higig ports bcm95670k8u switch fabric development kit with 8 higig ports - upgrade bcm95690k24 switch development kit with 24ge ports bcm95690k24s switch development kit with 24ge and 2higig ports bcm95690k24u switch development kit with 24ge - upgrade bcm95690k24su switch development kit with 24ge and 2higig ports - upgrade bcm95690r24 switch reference design with 24ge ports bcm95690r24s stackable switch reference design with 24ge ports bcm95690r24u stackable switch reference design with 24ge ports - upgrade bcm95690r48s stackable switch reference design with 48ge ports bcm95690r48su stackable switch reference design with 48ge ports - upgrade bcm95691k12 switch development kit with 12ge ports bcm95691k12u switch development kit with 12ge ports - upgrade note: all sdks now available with standard powerpc 8240 processor. idt 32334 or powerpc 8245 processor available with a longer lead time.
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r sample system configurations page 19 s ample s ystem c onfigurations what follows are just a few sample ge switch designs that leverage the strataxgs architecture. figure 10: fixed 24-port ge switch with optional advanced function module bcm5690 bcm5690 higig tm bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm8002 bcm8002 bcm1250 external ram external ram bcm1250 cpu dram dram flash memory advanced function module 2 x 6 port rj-45 2 x 6 port rj-45
BCM567X/bcm569x white paper 06/27/02 broadcom corporation page 20 sample system configurations document 567x_569x-wp100-r figure 11: 24-port ge switch with active stack module bcm5690 bcm5671 bcm5690 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 cpu dram dram flash memory optional fiber modules active stock modules 2 x 6 port rj-45 2 x 6 port rj-45
white paper BCM567X/bcm569x 06/27/02 broadcom corporation document 567x_569x-wp100-r sample system configurations page 21 figure 12: 48-port nonblocking ge switch bcm5670 higig tm bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5690 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 bcm5444 cpu dram dram flash memory 48 gigabit ethernet ports
document 567x_569x-wp100-r broadcom corporation 16215 alton parkway p.o. box 57013 irvine, california 92619-7013 phone: 949-450-8700 fax: 949-450-8710 broadcom ? corporation reserves the right to make changes without further notice to any products or data herein to improve reliability, f unction, or design. information furnished by broadcom corporation is believed to be accurate and reliable. however, broadcom corporation does not assume any liability arising out of the application or use of this information, nor the application or use of any prod uct or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. BCM567X/bcm569x white paper 06/27/02 s ummary and c onclusion businesses are become increasingly reliant on new web-based applications to automate their businesses and to reach customers and business partners across intranets, extranets, and the internet. network storage, voip, and other multimedia applications are driving the need for much higher lan connectivity speeds to the desktop. the broadcom strataxgs switch architecture enables sw itch vendors to meet enterprise customers? high-speed connectivity needs with modular, integrated components that serve as simple building blocks. the components, with high port counts and rich feature sets, keep system design and assembly simple, which lowers assembly time and costs, while providing designers with a high degree of flexibility in the form factors they choose to build and features they choose to activate. the strataxgs architecture allows the use of same building blocks for creating different types of systems. it is backward-compatible with proven strataswitch ii chip architecture and the broadcom development api so that components and expertise can be reused. this hastens a switch vendor?s time to market and lowers resource requirements/costs. using combinations of the broadcom bcm5670 and bcm5671 high-performance switching fabrics and the bcm5690 and bcm5691 ge switching chips, designers can scale their systems to support hundreds of ge and 10-ge ports, configured in a variety of form factors to meet the needs of their target applications.

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